PyHDL-IF Documentation

PyHDL-IF implements a procedural interface between Python and various HDL simulator interfaces. The library focuses on simplifying the task of implementing interactions between HDL and Python at a variety of abstraction levels.

Contents:

• Overview
  • Procedural-Interface API
  • Call-Interface API
  • TLM API
• Simulator Integration
  • SystemVerilog (DPI)
  • Verilog (VPI)
  • VHDL (VHPI)
  • VHDL (FLI)
• SystemVerilog API

Status and Roadmap

PyHDL-IF is still under active development. The information here attempts to capture the status of available features and a roadmap of planned future features.

Platform Support

Linux	Windows (x86_64)	MacOS (x86_64)	MacOS (arm64)
Yes	Planned	Planned	Planned

The native-compiled portions of PyHDL-IF are compiled according to the relevant Python version-specific requirements. If your favorite platform is not listed above and you would like PyHDL-IF to support, please file a feature-request ticket and note the platform and the simulator you typically use on that platform.

HDL Calling Python API

DPI	FLI	VPI	VHPI
Yes	Planned	Planned	Planned

Supporting HDL calls to the Python API allows HDL to interact with Python as if it was a Python extension by calling the Python C API.

Python calling HDL API

DPI	FLI	VPI	VHPI
Yes	Planned	Yes	Planned

Support Python calls to an HDL API allows Python to interact with simulator APIs as if it were a shared library loaded by the simulator. For example, support for VPI allows a Python module to walk through the design design hierachy and implement system tasks that the HDL can call.

Indices and tables

• Index

• Module Index

• Search Page